View AV9155C_174626.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Integrated Circuit Systems, Inc.
AV9155C
Low Cost 20-Pin Frequency Generator
General Description
The AV9155C is a low cost frequency generator designed specifically for desktop and notebook PC applications with either 3.3V or 5.0V power supply voltage. Its CPU clocks provide all necessary CPU frequencies for 286, 386 and 486 systems, including support for the latest speeds of processors. The device uses a 14.318 MHz crystal to generate the CPU and all peripheral clocks for integrated desktop motherboards. The dual 14.318 MHz clock outputs allows one output for the system and one to be the input to an ICS graphics frequency generator such as the AV9194. The CPU clock offers the unique feature of smooth, glitchfree transitions from one frequency to the next, making this ideal device to use whenever slowing the CPU speed. The AV9155C makes a gradual transition between frequencies, so that it obeys the Intel cycle-to-cycle timing specification for 486 systems. The simultaneous 2X and 1X CPU clocks offer controlled skew to within 1.5ns (max) of each other. ICS offers several versions of the AV9155C. The different devices are shown below:
PART AV9155C-01 AV9155C-02 AV9155C-23 AV9155C-36 DESCRIPTION Motherboard clock generator with 16 MHz BUS CLK Motherboard clock generator with 32 MHz BUS CLK Features a special 40 MHz SCSI clock Includes Pentium frequencies
Features
* * * Compatible with 286, 386, and 486 CPUs Supports turbo modes Generates communications clock, keyboard clock, floppy disk clock, system reference clock, bus clock and CPU clock Output enable tristates outputs Up to 100 MHz at 5V or 3.3V 20-pin DIP or SOIC All loop filter components internal Skew-controlled 2X and 1X CPU clocks Power-down option
* * * * * *
ICS has been shipping motherboard frequency generators since April 1990, and is the leader in the area of multiple output clocks on a single chip. The AV9155C is a third generation device, and uses ICS's patented analog CMOS phase-locked loop technology for low phase jitter. ICS offers a broad family of frequency generators for motherboards, graphics and other applications, including cost-effective versions with only one or two output clocks. Consult ICS for all of your clock generation needs.
Block Diagram
AV9155C Rev F 12/13/00
O
Pentium is a trademark of Intel Corporation.
AV9155C
Pin Configuration
20-Pin DIP or SOIC
20-Pin DIP or SOIC
Pin Descriptions for AV9155C-01, -02
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PIN NAME 1.843 MHz X2 X1 VDD GND 16 MHz/32 MHz 24 MHz 12 MHz AGND OE FS2 PD# 14.318 MHz 14.318 MHz GND VDD 2XCPU CPU FS1 FS0 TYPE Output Output Input Output Output Output Input Input Input Output Output Output Output Input Input DESCRIPTION 1.84 MHz clock output. Crystal connection. Crystal connection. Digital power supply (3.3V or 5.0V). Digital Ground. 16 MHz (-01) or 32 MHz (-02) clock output. 24 MHz floppy disk/combination I/O clock output. 12 MHz keyboard clock output. Analog ground (original version). Output enable. Tristates all outputs when low. (Has internal pull-up.) CPU clock frequency select #2. (Has internal pull-up.) Power-down. Shuts off entire chip when low. (Has internal pull-up.) 14.318 MHz reference clock output. 14.318 MHz reference clock output. Digital ground. Digital power supply (3.3V or 5.0V). 2X CPU clock output. 1X CPU clock output. CPU clock frequency select #1. (Has internal pull-up.) CPU clock frequency select #0. (Has internal pull-up.)
2
AV9155C
Functionality - AV9155C-01
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8 16 32 40 50 66.66 80* 100* CPU (Pin 18) 4 8 16 20 25 33.33 40* 50*
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.843 BUSCLK (Pin 6) 16 FDCLK (Pin 7) 24 KBCLK (Pin 8) 12
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*VDD minimum 3.15V.
Functionality - AV9155C-02
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8 16 32 40 50 66.66 80* 100* CPU (Pin 18) 4 8 16 20 25 33.33 40* 50*
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.843 BUSCLK (Pin 6) 32 FDCLK (Pin 7) 24 KBCLK (Pin 8) 12
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
* VDD minimum 3.15V
Frequency Transitions
A key feature of the AV9155C is its ability to provide smooth, glitch-free frequency transitions on the CPU and 2XCPU clocks when the frequency select pins are changed. These frequency transitions do not violate the Intel 486 specification of less than 0.1% frequency change per clock period.
Using an Input Clock as Reference
The AV9155C is designed to accept a 14.318 MHz crystal as the input reference. With some external changes, it is possible to use a crystal oscillator or clock input. Please see application note AN04 for details on driving the AV9155C with a clock.
3
AV9155C
Pin Configuration
20-Pin DIP or SOIC
20-Pin DIP or SOIC
Pin Descriptions for AV9155C-23, -36
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 X2 X1 VDD GND 16 MHz/15 MHz 24 MHz 12 MHz AGND OE FS2 PD# 14.318 MHz 14.318 MHz GND VDD 2XCPU CPU FS1 FS0 PIN NAME 1.843/40 MHz TYPE Output Output Input Output Output Output Input Input Input Output Output Output Output Input Input DESCRIPTION 1.84 MHz (-23)/40 MHz SCSI (-36) clock output. Crystal connection. Crystal connection. Digital power supply (3.3V or 5.0V). Digital ground. 16 MHz (-23)/15 MHz (-36) clock output. 24 MHz floppy disk/combination I/O clock output. 12 MHz keyboard clock output. Analog ground (original version). Output enable. Tristates all outputs when low. (Has internal pull-up.) CPU clock frequency select #2. (-23 has internal pull-up.) Power-down. Shuts off entire chip when low. (Has internal pull-up.) 14.318 MHz reference clock output. 14.318 MHz reference clock output. Digital ground. Digital power supply (3.3V or 5.0V). 2X CPU clock output. 1X CPU clock output. CPU clock frequency select #1. (-23 has internal pull-up.) CPU clock frequency select #0. (-23 has internal pull-up.)
4
AV9155C
Functionality - AV9155C-23
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 75* 32 60 40 50 66.66 80* 52 CPU (Pin 18) 37.5* 16 30 20 25 33.33 40* 26
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.843 BUSCLK (Pin 6) 16 FDCLK (Pin 7) 24 KBCLK (Pin 8) 12
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*VDD minimum 3.15V
Functionality - AV9155C-36
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8 16 60 40 50 66.66 80* 100* CPU (Pin 18) 4 8 30 20 25 33.33 40* 50*
PERIPHERAL CLOCKS
SCSICLK (Pin 1) 40 BUSCLK (Pin 6) 15 FDCLK (Pin 7) 24 KBCLK (Pin 8) 12
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*VDD minimum 3.15V
5
AV9155C
Absolute Maximum Ratings
VDD referenced to GND . . . . . . . . . . . . . . . . . . . . . . 7V Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V Operating temperature under bias. . . . . . . . . . . . . . . . 0C to +70C Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics at 5V
VDD = 4.0 to 5.5V (5V +10%/-20%); TA=0C to 70C unless otherwise stated
DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input High Voltage, PD# Input Low Current Input High Current Output Low Voltage Output High Voltage Output Low Current Output High Current Supply Current Supply Current, Power-down Output Frequency Change over Supply and Temperature 1 Short circuit current Input Capacitance Load Capacitance Pull-up Resistor
1 1 1 1 1 1 1
SYMBOL VIL VIH VIHPD IIL IIH VOL VOH IOL IOH IDD IDDPD FD ISC CI CL Rpu
TEST CONDITIONS VDD=5V VDD=5V VDD=5V, for PD# input VIN=0V (pull-up pin) VIN=VDD IOL=8mA IOH=-25mA VOL=0.8 VOH=2.0V Unloaded, 66 MHz SCLKx=000 PD#=0 With respect to typical frequency Each output clock Except X1, X2 Pins X1, X2 at VIN=VDD-1V
MIN 2.0 2.2 -5 2.4 15 25 120
TYP 16 0 0.15 3.7 32 -48 38 0.7 0.002 40 20 350
MAX 0.8 35 5 0.4 -30 60 1.5 0.01 10 700
UNITS V V V A A V V mA mA mA mA % mA pF pF k ohm
Notes: 1 Parameter is guaranteed by design and characterization, not subject to production testing.
6
AV9155C
Electrical Characteristics at 5V
VDD = 4.0 to 5.5V (5V +10%/-20%); TA=0C to 70C unless otherwise stated
AC Characteristics PARAMETER Input Clock Rise Time 1 Input Clock Fall Time Output Rise time Rise time
1 1 1
SYMBOL tICr tICf tr tr
TEST CONDITIONS
MIN -
TYP 1.5 2.0 1.0 1.3 48/52 43 0.8
MAX 20 20 2 4.0 2.0 3.0 55/45 50 2.0
UNITS ns ns ns ns ns ns % % %
25pF load, 0.8 to 2.0V 25pF load, 20% to 80% VDD 25pF load, 2.0 to 0.8V 25pF load, 80% to 20% VDD 25pF load at 1.4V 25pF load at 1.4V 10,000 cycles
45/55 36 -
Output Fall time Fall time 1 Duty cycle
1 1
1
tf tf dt dt tjls1
Duty cycle, reference clocks Jitter, one sigma 1 , 20 to 50 MHz clocks 1 on CPU and 40 to 100 MHz on 2XCPU Jitter, one sigma 1 , fixed clock & clocks below 20 MHz on CPU, below 40 MHz on 2XCPU Jitter, absolute 1 , 20 to 50 MHz clocks 1 on CPU and 40 to 100 MHz on 2XCPU Jitter, absolute 1 , fixed clock & clocks below 20 MHz on CPU, below 40 MHz on 2XCPU Input Frequency
1
tjls2
10,000 cycles
-
0.8
2.0
%
tjab1
10,000 cycles
-4.0
2.0
4.0
%
tjab2 fin fout Tsk ttPO
10,000 cycles
-5.0 2
2.0 14.318 220 140 8 6.5 1.8 2.5
5.0 32
% MHz MHz
Maximum Output Frequency 1 Clock skew between CPU and 2XCPU outputs 1 Power-up Time
1 1
at 2XCPU
100 -
400 15 12 3.2 5.0
ps ms ms ms ms
to 66 MHz from 8 to 66.66 MH from 32 to 80 MHz from 80 to 32 MHz
-
Frequency Transition Time
tft
Notes: 1 Parameter is guaranteed by design and characterization, not subject to production testing.
7
AV9155C
Electrical Characteristics at 3.3V
VDD =3.0V to 3.7V, TA=0C to 70C unless otherwise stated
DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input High Voltage, PD# Input Low Current Input High Current Output Low Voltage Output High Voltage Output Low Current Output High Current Supply Current Supply Current, Power-down Output Frequency Change over Supply and Temperature 1 Short circuit current Input Capacitance Load Capacitance Pull-up Resistor 1
1 1 1 1 1 1
SYMBOL VIL VIH VIHPD IIL IIH VOL VOH IOL IOH IDD IDDPD FD ISC CI CL Rpu
TEST CONDITIONS VDD=3.3V VDD=3.3V VDD=3.3V, for PD# input VIN=0V (pull-up pin) VIN=VDD IOL=4mA IOH=-3.5mA VOL=0.2VDD VOH=0.7VDD Unloaded, 66.6 MHz SCLKx=000 PD#=0 With respect to typical frequency Each output clock Except X1, X2 Pins X1, X2 at VIN=VDD-1V
MIN 0.7VDD 2.2 -5 12 20 120
TYP 11 0 0.05VDD 0.94VDD 22 -11 28 0.25 0.002 30 20 330
MAX 0.2VDD 25 5 0.1VDD -6.5 45 0.5 0.01 10 650
UNITS V V V A A V V mA mA mA mA % mA pF pF k ohm
Notes: 1 Parameter is guaranteed by design and characterization, not subject to production testing.
8
AV9155C
Electrical Characteristics at 3.3V
VDD = +3.3V10%, TA=0C to 70C unless otherwise stated
AC Characteristics PARAMETER Input Clock Rise Time Input Clock Fall Time Rise time 1 Fall time 1 Duty cycle
1 1 1 1
SYMBOL tICr tICf tr tf dt dt tjls1 tjab1 fin
1,2
TEST CONDITIONS
MIN -
TYP 3.0 1.8 48 36 0.8 2.0 14.318 140 220 6 6
MAX 20 20 4.0 2.5 60 67 2.5 5.0 32 500 12 12
UNITS ns ns ns ns % % % % Mhz MHz ps ms ms
25pF load, 20% to 80% VDD 25pF load, 80% to 20% VDD 25pF load at 50% VDD 25pF load at 50% VDD 10,000 cycles 10,000 cycles at 2XCPU
40 33 -5.0 2 7 100
Duty cycle, reference clocks Jitter, one sigma Jitter, absolute
1 1 1
Input Frequency
Maximum Output Frequency
fout Tsk ttPO
Clock skew between CPU and 2XCPU outputs 1 Power-up Time 1 Frequency Transition Time
1
to 66 MHz from 8 to 50.0 MHz
-
tft
Notes: 1 Parameter is guaranteed by design and characterization, not subject to production testing. 2 Output frequencies on 2XCPU of 80 or 100 MHz require minimum VDD of 3.15V (3.3 -5%).
9
AV9155C
Actual Output Frequencies
(Using 14.318 MHz input. All frequencies in MHz.) AV9155C-01 and AV9155C-02 CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 7.50 15.51 32.22 40.09 50.11 66.82 80.18 100.23 CPU (Pin 18) 3.75 7.76 16.11 20.05 25.06 33.41 40.09 50.11
AV9155C-23 CPU CLOCK
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 75.170 31.940 60.136 40.090 50.113 66.476 80.181 51.903 CPU (Pin 18) 37.585* 15.970 30.068 20.045 25.057 33.238 40.091 25.952
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.846 BUSCLK (Pin 6) 32.01 or 16.00 FDCLK (Pin 7) 24.00 KBCLK (Pin 8) 12.00
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.846 BUSCLK (Pin 6) 16.00 FDCLK (Pin 7) 24.00 KBCLK (Pin 8) 12.00
AV9155C-36 CPU CLOCK
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8.054 16.002 59.875 39.886 50.113 66.476 80.181 100.226 CPU (Pin 18) 4.027 8.001 29.936 19.943 25.057 33.238 40.091 50.113
PERIPHERAL CLOCKS COMMCLK BUSCLK (Pin 1) (Pin 7)
40.00 15.00
FDCLK (Pin 6) 24.00
KBCLK (Pin 8) 12.00
10
AV9155C
AV9155C Recommended External Circuit
Notes: 1. ICS recommends the use of an isolated ground plane for the AV9155C. All grounds shown on this drawing should be connected to this ground plane. This ground plane should be connected to the system ground plane at a single point. Please refer to AV9155C Board Layout Diagram. 2. A single power supply connection for all VDD lines at the 2.2F decoupling capacitor is recommended to reduce interaction of analog and digital circuits. The 0.1F decoupling capacitors should be located as close to each VDD pin as possible. 3. A 33 series termination resistor should be used on any clock output which drives more than one load or drives a long trace (more than about two inches), especially when using high frequencies (>50 MHz). This termination resistor is put in series with the clock output line close to the clock output. It helps improve jitter performance and reduce EMI by damping standing waves caused by impedance mismatches in the output clock circuit trace. 4. The ferrite bead does not enhance the performance of the AV9155C, but will reduce EMI radiation from the VDD line.
11
AV9155C
AV9155C Recommended Board Layout
This is the recommended layout for the AV9155C to maximize clock performance. Shown are the power and ground connections, the ground plane, and the input/output traces. Use of the isolated ground plane and power connection, as shown, will prevent stray high frequency ground and system noise from propagating through the device. When compared to using the system ground and power planes, this technique will minimize output clock jitter. The isolated ground plane should be connected to the system ground plane at one point, near the 2.2F decoupling cap. For lowest jitter performance, this isolated ground plane should be kept away from clock output pins and traces. Keeping the isolated ground plane area as small as possible will minimize EMI radiation. Use a sufficient gap between the isolated ground plane and system ground plane to prevent AC coupling. The ferrite bead in the VDD line optional, but will help reduce EMI. The traces to distribute the output clocks should be over a system ground or power supply plane. The trace width should be about two times the thickness of the PC board between the trace and the underlying plane. These guidelines help minimize clock jitter and EMI radiation. The traces to distribute power should be as wide as possible.
12
AV9155C
20-Pin DIP Package
Ordering Information
AV9155C-02CN20, AV9155C-23CN20, AV9155C-36CN20
Example:
ICS XXXX-PPP M X#W
Lead Count & Package Width
Lead Count=1, 2 or 3 digits W=.3" SOIC or .6" DIP; None=Standard Width
Package Type
N=DIP (Plastic#) T&R=Tape and Reel
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix
ICS, AV=Standard Device
Notes: Tape and reel packaging should be ordered with the suffix T&R. For instance, if the -01 in DIP and tape & reel is required, order the part as AV9155C-01CN20T&R.
13
AV9155C
LEAD COUNT DIMENSION L
14L 0.354
16L 0.404
18L 0.454
20L 0.504
24L 0.604
28L 0.704
32L 0.804
Ordering Information
AV9155C-01CW20, AV9155C-02CM20, AV9155C-23CM20, AV9155C-36CM20
Example:
ICS XXXX-PPP M X#W
Lead Count & Package Width
Lead Count=1, 2 or 3 digits W=.3" SOIC or .6" DIP; None=Standard Width
Package Type
W=SOIC
T&R=Tape and Reel
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix
ICS, AV=Standard Device
14

▲Up To Search▲

Price & Availability of AV9155C

	To Download AV9155C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .